1. Field of the Invention
The present invention relates to a synchronization correction circuit in which the period of clock signals is corrected in accordance with variations in the period of a received packet. More particularly, it relates to the synchronization correction circuit used in radio equipment to which Bluetooth, as one of the radio communication specifications or standards, is applied.
2. Description of the Background Art
Among the radio communication standards applied to a radio communication system for interconnection between equipment lying at a close distance to each other on the order of 10 meters, for example, between a personal computer and peripheral equipment, there is a specification or standard termed Bluetooth. In the telecommunication system to which the Bluetooth is applied, a master and a slave alternately transmit and receive packets, every time slot of 625 μsec, in repeated fashion, as shown in FIG. 8A, to transmit packets. Meanwhile, packets may be transmitted over two or more time slots, as shown in FIGS. 8B and 8C.
In Bluetooth, three types of packets are defined as packets used for transmitting or receiving voice data. Of these, a packet of the type HV 1 is used in an application in which voice data of 10 bytes are transmitted or received at a transmission interval of 1.25 msec, a packet of the type HV 2 is used in case voice data of 20 bytes are transmitted or received at a transmission interval of 2.5 msec, and a packet of the type HV 3 is used in an application in which voice data of 30 bytes are transmitted or received at a transmission interval of 3.75 msec. A voice packet includes a synchronization word (sync word) and a payload. The payload carries voice data.
FIG. 9 is a block diagram schematically showing the structure of a conventional radio transmitter-receiver used as a master or as a slave. A high frequency unit 70 transmits and receives a packet with high frequency signals of 2.4 GHz, using a spread spectrum system and a GFSK (Gaussian frequency shift keying) modulation/demodulation system. A baseband processing unit 72 executes processing for establishing and managing a link with another equipment, under the control of a controller (CPU) 76 which is connected thereto over a bus (CPUBUS) 78. For example, the baseband processing unit 72 assembles a packet 160 of voice data 158 to output the resulting packet to the high frequency unit 70, while disassembling the packet 150 received form the high frequency unit 70 to take out voice data 152.
A voice data converter 74 is used for reciprocally converting the encoding scheme for voice data 152, 158, transferred to and from the baseband processing unit 72, and the encoding scheme for voice data 154, 156, transferred to and from a PCM (pulse code modulation) CODEC. Specifically, the voice data converter 74 selects each one of three encoding schemes that can be coped with by the baseband processing unit 72, namely CVSD (continuously variable slope delta modulation) A-law and μ-law, and each one of three schemes that can be coped with by the PCM CODEC, namely PCM linear, A-law and μ-law, under the control of the controller 76, to reciprocally convert the encoding scheme.
In the so constructed radio transmitter-receiver, clock signals or synchronization signals, used for reciprocally converting the encoding schemes in the voice data converter 74, are generated on the basis of a signal output from an independent transmission source.
However, it is a frequent occurrence that the frequency of the transmission source in a master and that of a slave in actuality differ delicately from each other. If, in such a case, the demodulated voice data is processed in the slave using clock signals or synchronization signals, generated on the basis of a signal output from the independent transmission source, data overflow or underflow necessarily occurs.
For example, in an application where voice data are transmitted from a device A to a device B, which may be LSIs (large scale integration), if the rate of system clocks in the LSI A is faster than that in the LSI B, the period of the synchronization signal (PCMSYNC) of the LSI A is then smaller than that of the synchronization signal (PCMSYNC) of the LSI B as shown FIG. 10, so that the data volume transmitted from the LSI A becomes larger than the data volume processed by the LSI B, thus producing overflow in the LSI B. If conversely the voice data are transmitted from the LSI B to LSI A, the processing data volume is in shortage in the LSIA, thus producing underflow. Such overflow and underflow cause speech quality to be deteriorated.